GREG A. STILLS
24241 Avery Drive
Los Angeles, California. 90025
(310) 284-1338
FAX: (310) 284-1354
e-mail: gstills@io.com
A communications and storage products design engineer with 16 years' experience in managing, marketing, and developing high-performance I/O adapters, CPUs, networking and storage products for the world's largest computer manufacturer and leading computer peripheral companies.
A high-energy professional in search of a technical challenge that demands project organization skills, big-picture vision and a dedicated team leader.
4 Ways Inc., Ventura, California 1997-1998
Manager of Electrical Engineering
Directed a team of engineers and technicians designing and developing electronics for a 3-Dimensional Imaging equipment manufacturing company with annual sales of $100 million.
- Created an electronics road-map for the next two generations of products.
- Formalized, scheduled and completed first pass PCBs for four major next generation projects consisting of a main controller, a waveform generator, sensor and motion controllers, and a laser light loop detector.
- Reorganized the department's distribution of work based on talent and company goals. Recruited new electrical engineering staff. Created and implemented the department's $900,000 budget.
- Modified engineering design practices that improved efficiency and design quality.
- Saved $280,000 annually by replacing expensive components using alternative suppliers and negotiating electronic supplier contracts.
Micro Electric Research, Dallas, Texas 1996-1997
Electrical Engineering Consultant
Constructed architecture and guided implementation of higher performance and lower cost Gigabit Ethernet and HiPPI I/O adapters for IBM and Essential Communications. The IBM HiPPI adapter permitted IBM to satisfy a $93 million government contract.
Texas Instruments 1983-1996
Advisory Engineer, Dallas, Texas (1990-1996)
HACMP/6000 Market Development Department
Provided technical assistance to the marketing department and its clients concerning integration projects for the company's High Availability Cluster Multi-Processing (HACMP) software product, a program that provides a software solution to prevent accidental application downtime. The department generated sales in excess of $10 million. Projects involved high-speed channel connections, storage solutions, distributed storage management and fault tolerance issues.
- Provided technical product briefings to more than 80 prospective customers.
- Participated on the team that set marketing strategies for the product.
Communications and Storage Development Department
Architect and program manager for the High Performance Parallel Interface (HiPPI) gigabit I/O adapter. This adapter duplicated the performance of a $130,000 Cray Supercomputer I/O Channel for a price of $18,000. Adapter sales grew to more than $3.6 million per year and facilitated more than $150 million of additional systems sales. Participated in the architecture of the Fibre Channel Standard (FCS) gigabit I/O adapter. Wrote the firmware interface specification and directed its implementation.
- Designed the architecture for the hardware portion of the adapter and oversaw detailed implementation
- Authored and directed the software and hardware product testing plan. Worked with seven communications and storage vendors to insure product compatibility.
- Founded, with three other companies, the HiPPI Networking Forum (HNF) industry alliance. Participated in the Fibre Channel Standard Initiative (FCSI) industry group on profile development.
- Identified performance problems with TCP/IP and file system access codes resulting in a 3,000% performance increase.
Staff Engineer, Dallas, Texas (1987-1991)
RISC/6000 CPU Development
Participated in the development of IBM's new RISC/6000 systems and CPUs. Established the CPU design and verification methodology for chip design
- Led the debugging team for the RISC system CPU chip sets and reduced turnaround time by 80%.
- Led a multi-site team that tested and simulated the SJ0 CPU chip set, facilitating on-schedule delivery.
Senior Associate Engineer, Orlando, Florida & Dallas, Texas (1985-1987)
RISC/6000 Systems Architecture Department
Participated on a team that defined the future direction and architecture for the company's new engineering workstation products. This included the evaluation and selection of an I/O bus for each new product. Performed competitive analyses and defined the requirements for new products.
I/O VLSI Chip Logic Design
Contributed to the logic design of VSLI I/O channel chips for the Series/1 mid-range commercial server system. Designed and verified the logic for the memory management and performance monitor chips.
Associate Engineer, Orlando, Florida (1983-1985)
VLSI Circuit Design department
Designed and coded an algorithmic Programmable Logic Array macro generator for the circuit design Series/1 processor. Designed VLSI circuit macros.
Engineering Co-op, Orlando, Florida (1980-1983)
VLSI Circuit Design department, IBM Boca Raton, Florida
Designed and simulated a RAM macro and combinatorial logic circuits.
Sonar Development I Department, IBM, Manassas, Virginia
Designed and debugged new ALU plug-in modules for Sonar systems.
Notre Dame University, South Bend, Indiana
Bachelor of Science, Electrical Engineering, Dean's List, GPA 5.93/6.00, 1983
Other: Florida Atlantic University, business courses; IBM Continuing Education, professional development courses
Outstanding Technical Achievement for an I/O Adapter Product, IBM
Division Award for RISC System/6000 CPU Development, IBM
Excellence Award for VLSI Design Tool Support, IBM